- SpringSoft Community Conferences 2010
- Custom Digital Place & Route Whitepaper
- Download the Whitepaper on PCell Caching
- Get the technical info you need – Resource Library
Solutions
Verdi Automated Debug
Cut debug time by 50%
Siloti Visibility Automation
Eliminate simulation overhead
Certitude Functional Qualification
Removing verification uncertainty
Technical Articles
Getting Productive! -
CiEOnline.com
Semiconductor Devices Call for Power-Aware Debug -
Chip Design Magazine
Technical Papers
Solutions
Laker Custom Layout Automation System
Superior Layout Results with Less Effort
Laker Advanced Design Platform
Open Schematic Editing, Simulation & Debug Environment
Technical Articles
Using Standards-based tools to Scale Chip Designs to Next-Gen Geometries -
Embedded.com
A Silicon Proven Interoperable PDK -
EDADesignline.com
Technical Papers
August 24, 2010
Winbond Adopts SpringSoft Laker Layout and Routing Systems for Design of High Performance, Low Power Memory Chips
August 5, 2010
SpringSoft Monthly Sales of July 2010
August 2, 2010
SpringSoft Validates Full Interoperability of Custom Chip Design Solutions with STARC 90nm iPDK
SpringSoft EDA Solutions Blog 
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