CUSTOM IC DESIGN AUTOMATION SHOWCASE: INTEROPERABLE MULTI-VENDOR SOLUTIONS

DAC Booth #3367

SpringSoft's Laker^TM Custom Layout software is the core of an interoperable set of best-in-class tools that each offer specialized custom IC design automation solutions. Laker provides unique layout automation technology that gives users better layout results in less time and anchors targeted, application-specific and customer-specific automation solution sets. The Laker community of partners will show how tools which are leaders in their own right become even more powerful when they interoperate with Laker, each adding value to the other. The SpringSoft Custom IC Design Interoperability Showcase will be running throughout the show on the show floor in the SpringSoft booth #3367

What we'll be showing

• DRC and LVS clean layout achieved by verification solutions from Mentor Graphics, Polyteda and Synopsys that run, review and correct data in-situ for optimal layout in the least amount of time.
• Advanced routing solutions from Pulsic and Pyxis running with Laker including the industry's first multi-vendor application of the OA run-time model for real-time, interactive routing of your biggest designs.
• Dramatic increases in mixed-signal design productivity by running the Ciranova analog and Laker custom digital placers in the Laker environment.
• Data Management solutions from ClioSoft and Dassault Systemes that assure revision control and enable global collaboration.
• Impressive quality of results using tools from Anchor Semiconductor, Apache, and Micrologic that offer power, yield and electrical awareness and provide immediate feedback during the layout process.

Participating partners and schedule

Anchor Semiconductor

NanoScope^TM HPA-B

• NanoScope HPA-B with pattern-centric technology provides mask defects or hotspots pattern searching and grouping capabilities
• Seamless integration of HPA-B and the Laker^TM Custom Layout System enables real time manufacturing-aware design
• Quick pattern searching, litho simulation, and visualization of results inside the Laker environment can significantly reduce design debug time for yield optimization

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Apache

Totem

• Full-chip capacity analog/mixed-signal power, noise and reliability solution
• Concurrent simulation of P/G, substrate, and package/PCB networks
• Cross-probing with Laker^TM for ease-of-debug and interactive ‘what-if'

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Ciranova

Ciranova Helix

• Automatic placement & trial routing for custom designs
• Fully supports iPDK and Interoperable PDK Libraries
• Fully integrated with Laker^TM Custom Layout System

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Cliosoft

SOS viaLaker Custom Layout System

Data Management for the Laker Custom Layout System

• Multi-site Team Collaboration
• Manage Libraries, Cells and views
• DM for Design Hierarchy
• Convenient Auto Check-out

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Dassault Systemes

ENOVIA Synchronicity DesignSync®

• Industry leader with tens of thousands of production users in 100+ companies
• Proven benefits in improved collaboration and quality
• Provides best mix of performance and ease of use with integrations to key EDA and SW environments, such as the Laker^TM Custom Layout System
  
• Manage complex data types common to EDA, including Laker MCells ^TM
• Tight EDA tool integration connecting IC designs to Product Lifecycle Management process

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Mentor Graphics

Optimized PV Debugging With Calibre

• Maximize Waiver Flow Efficiency
• Reduced DRC/LVS Debugging Cycle Time
• Simplify Debugging Issues with New RVE

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Micrologic

We make your design sign-off ready!

VisualDRC^TM - Live DRC Running the Laker^TM Custom Layout

• Graphical Alert for Design Rule violations
• Live DRC Check - On The Fly
• Imports Calibre, Assura, Hercules rule decks
• Hierarchical & Flat

nanoRVInteractive^TM - Reliability-Aware Design Environment Integrated with the Laker Layout System

• Graphical Alert for Reliability issues
• Covers Electromigration, Self Heat, Antenna, Fuse
• HSPICE®, Spectre^TM simulation (DC, Transient) support

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Polyteda

PowerDRC/LVS

• Fast, accurate DRC checks for advanced processes
• Sign-off accuracy - tapeout on time
• Easy to use - familiar Laker debug environment

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Pulsic

Unity

• Pulsic's Unity^TM platform provides integrated custom design automation flow for memory, microprocessor, FPGA, LCD, LED and custom digital, AMS designs
• Unity & Laker^TM Custom Layout System integrated through OpenAccess
• Unity components provide Floorplanning, Placement, Routing, Signal, Integrity, ECO & Timing

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Pyxis Technology

NexusRoute -HPC

High Performance Custom Routing

• Fully hierarchical routing with the Laker Custom Layout Sysytem with no data abstraction or translation required
• Integrated extraction, timing, DRC & DFM engines for rapid routing "what-if analysis"
• Productivity enhancement by reducing cycle time from months to days
• The laker layout system & NexusRoute -HPS - world's only commercial OA Run-Time-Model integration!

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Synopsys

IC Validator DRC/LVS

In-Design Physical Verification

• 4x Faster Physical Verification Closure
• Fast Debug with the Laker Layout System Integration
• Highest Scalable Throughput - 7x on 8 CPUs
• Signoff qualified at Leading Foundry's and Chip Manufacturers

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