SpringSoft EDA Solutions Blog

SpringSoft EDA Solutions Blog

Welcome to the SpringSoft EDA Solutions Blog.

The EDA blog is intended to provide users insights on how to use SpringSoft’s solutions more effectively. From time to time we’ll also post material related to user experiences. We welcome your feedback and input on the EDA blog posts, so please don’t be shy if you have questions or comments.


Executing Tcl Scripts in Novas
August 31, 2010

Tcl is a general purpose programming language which is widely used in EDA tools. With Tcl scripts you can extend and customize a tool’s capability, to make your design flow to be more efficient. The Verdi™ Automated Debug System has embedded the Tcl interpreter so that users can easily execute their own Tcl scripts in the Verdi system. There are various ways to execute the Tcl script in the Verdi system.

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Using PyCells in the Laker Matching Device Creator and Stick Diagram Window
August 24, 2010

Beginning in Q3, 2010, the OpenAccess version of Laker Custom Layout System will enable the use of interoperable PyCells™ with the popular Laker transistor-level floor planning tools, Matching Device Creator and Stick Diagram window. Previously this unique technology was only available for use with our patented Laker MCells™. WithPyCell "stretch handle" and auto-abut capabilities enabled, PyCell placement results can be optimized in the same way as when using MCells; you no longer have to select and place each PyCell manually.

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Using the cdsLib Plugin from Cadence Design Systems for OpenAccess
August 23, 2010

In the 6.14 release of the Virtuoso® Layout and Schematic Editor from Cadence Design Systems, the library definition map file, lib.defs, has been replaced by the Cadence® native library definition map file, cds.lib; therefore, the lib.defs file is no longer valid for Cadence IC6.14 or later releases. This creates problems when a user mixes OpenAccess tools from other vendors.

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Debug Unknowns with List Power Related X
August 17, 2010

The Verdi™ Automated Debug system supports thestandard power formats, Common Power Format (CPF) and Unified Power Format(UPF), as well as the related power-aware debugging capability. This was initially introduced in the 2009.10 newsletter.

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Report Power Impacted Signals
August 12, 2010

The Verdi™ Automated Debug system supports the standard power formats, Common Power Format (CPF) and Unified Power Format (UPF), as well as the related power-aware debugging capability. This was initially introduced in the 2009.10 newsletter.

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Upgrade to the New Unified FSDB Dumper with Good Reasons
August 10, 2010

A new breed of FSDB dumper has been provided since Novas 2009.10. Different from previous FSDB dumpers, the new dumper is unified to support a broader range of simulators andversions. Currently, the new dumper can support Cadence IUS 6.2, Synopsys VCS2006.06, Mentor Graphics ModelSim 6.4b and their later versions. This topic was originally introduced in the 2010.02 newsletter.

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Certitude™ Methodology Primer: Early Application Provides Significant Value
August 9, 2010

The Certitude™ Functional Qualification System identifies holes and weaknesses in the verification environment that can let RTL bugs slip through the process undetected. Although you can apply Certitude at many different points throughout the verification process, experience has shown that an incremental approach beginning in the early stages is often best – providing immediate value and improving the verification environment over time while balancing resources vs. other verification activities.

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Use Auto Create Wire to Create Wire Segments for Floating Pins
June 1, 2010

The LakerTM Advanced Design Platform (ADP) unites the full-featured Laker schematic editor, open simulation console and waveform analyzer to provide a complete solution for the rapid design of your analog, mixed-signal, memory, and custom digital IC designs.

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Report Selected Signals in Waveform View
May 27, 2010

The Verdi system provides a batch mode utility fsdbreport to write out specific signal transitions in a specific time range. However, sometimes it would be more convenient to generate this report from the GUI - since you can view and select signals you would like to report from the intuitive waveform view interactively.

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Load Partial Design into Verdi
May 25, 2010

The Verdi system provides a way to only load partial designs from a compiled library using the command line option -impConf. To use this option, you can create a configuration file which includes one or more scopes to be loaded. For example, the configuration file content could contain the following:

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