SpringSoft simplifies verification of low-power chips
Published in Components in Electronics - CiE.com
SpringSoft, a supplier of specialised IC design software, has introduced a new power-aware debug module for its Verdi Automated Debug system. Power-aware debug has been designed to accelerate the comprehension of power intent and automates the process of visualising, tracing and analysing the source of power-related errors. The module is fully integrated with the hardware description language (HDL) debug capabilities of the Verdi system.
The power-aware debug module combines support for the United Power Format (UPF) and Common Power Format (CPF) with design comprehension tools for understanding power intent and automated debug techniques to determine whether unexpected design behavior is caused by functional logic or power-related issues. These capabilities are enabled within the Verdi environment for more efficient understanding and debug of low-power system-on-chip (SoC) designs. An early adopter release of the power-aware debug module is already in use by several top-tier global semiconductor companies.
