Verdi power-aware debug module enables visualization of power intent
Julien Happich
EETimes Europe
PARIS — SpringSoft introduced a new power-aware debug module for its Verdi automated debug system, accelerating the comprehension of power intent and automating the process of visualizing, tracing and analyzing the source of power-related errors.
The module is fully integrated with the hardware description language (HDL) debug capabilities of the Verdi system, the cornerstone of SpringSoft's family of Novas Verification Enhancement products.
The power-aware debug module combines support for the United Power Format (UPF) and Common Power Format (CPF) with design comprehension tools for understanding power intent and automated debug techniques to determine whether unexpected design behavior is caused by functional logic or power-related issues.
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