Laker Analog Prototyping
The Laker Analog Prototyping Tool automates the placement of analog devices. This improves layout productivity and provides designers with fast feedback of layout dependent effects. It has built-in understanding of analog layout requirements, so it is much easier to adopt and deploy than competing analog automation tools. Laker Analog Prototyping includes all of Laker’s award-winning schematic-driven layout features and adds significant new functionality that speeds completion of custom analog layout.
Analog Prototyping Flow
Analog prototyping with Laker starts with an analog schematic or netlist. From there, the Laker Analog Prototyping Tool analyzes your circuit and automatically generates placement constraints that drive the automatic placement engine to create high quality placement results. The placement engine generates multiple example placements, all of which meet the design constraints. From there, you can refine the constraints as needed until you find a placement you like. Using Laker Analog Prototyping, it is much faster to complete the placement of analog circuits, so you can generate early placement results for circuit designers to use for layout-aware simulation.
Laker Analog Prototyping includes all of the features of Lakers Schematic-Driven Layout product, and adds the following new capabilities
- Automatic constraint extraction
- Design rule checking engine with advanced-node rule support
- Pattern editor for placement and routing of matched devices
- Automatic constraint-driven placement
- Hierarchical analog prototyping
Automatic Constraint Extraction
Generating proper constraints is an important part of the analog prototyping flow. Laker automates this process with an automatic constraint extraction engine. Laker automatic constraint extraction identifies devices that have symmetrical current flows and forms them into symmetry groups. Laker also recognizes common sub-circuit types, for example differential pairs, current mirrors, voltage references, etc., and automatically forms them into matching device patterns. It finds digital logic and forms them into transistor chains with properly aligned gates. You can view your constraints with Laker’s hierarchical constraint browser and edit them as needed. Laker can read and write constraint files in the industry standard iConstraint format.
Design Rule Checking Engine
Laker Analog Prototyping includes the full version of the Laker LiveDRC Design Rule Checking Engine with advanced node support. This engine is used by the placement engine to create design-rule correct placements. With this engine, rule-driven layout editing with Laker is substantially improved over the basic rule-driven editing. Any design rule can be checked dynamically during editing – not just the basic width and spacing rules. After a shape is added, any design rule errors that Laker detects will be displayed with fixing guides that show you how to fix the error. The Laker LiveDRC Design Rule Checking Engine can work directly from the Laker technology file for many of the design rules – no special rule file is required. For advanced rules, users can download foundry-provided Laker design rule format files.
Pattern Editor for Placement and Routing of Matched Devices
One of the most powerful productivity-enhancing features of Laker is the Laker Matched Device Creator, a symbolic pattern editor for handling matching devices. You can draw from Laker’s built-in pattern library to apply matching placement patterns to devices, for example placing a differential pair in a common centroid configuration. You can also expand the pattern library by creating your own patterns of device placement. The constraint extractor will apply a default pattern from the matching pattern library for a given subcircuit type, or you can modify the choice Laker makes by choosing a different pattern and saving it as a constraint. Laker Analog Prototyping includes the Matched Device Creator, and adds matched device routing capability. You can modify the matched routes that Laker adds by dragging the symbolic wires to the locations you want. When the pattern is instantiated into the layout, DRC correct wiring will be included.
Automatic Constraint-Driven Placement
The automatic constraint-driven placement in Laker Analog Prototyping is capable of meeting a variety of analog constraints, including symmetry, matching, cluster, spacing and variation constraints. It generates multiple solutions so you can explore a variety of potential solutions to find the one that works best for you. The placer uses the built-in LiveDRC design rule checker to generate design rule correct placements. It also checks for Routability using a built-in trial router and adds space between components as needed to create a routable placement. The placer can also enforce constraints related to layout dependent effects (LDE) via integration with third-party LDE engines such as ALPS from TSMC. Pin placement can be handled automatically, or it can be taken from the pin locations in the schematic of from a floorplan layout. The floorplan layout can also be used to pre-place critical devices. The placer will maintain the relative locations of pre-placed devices from the floorplan when placing the remaining devices.
Hierarchical Analog Prototyping
Laker supports hierarchical prototyping through an included physical hierarchy manager. The hierarchy manager GUI shows users the blocks in their design and allows them to configure the constraint extraction and placement settings for each block. During hierarchical placement, multiple potential solutions are generated for sub-block for use in next higher level in the hierarchy with only the best solutions preserved. This process continues for each level in the hierarchy until reach the top. With Laker hierarchical analog prototyping, designs with thousands of devices can be placed in minutes.
Laker Analog Prototyping
Either for getting quick feedback of layout dependent effects, or as a way to speed final analog layout creation, Laker Analog Prototyping is an essential tool for analog design flows.