Laker^TM Blitz

SpringSoft’s Laker^™ Blitz is a chip-level layout editor for chip finishing operations that accelerates the handoff of large, high density designs to manufacturing.

Laker Blitz allows you to:  

• Reduce final tapeout-to-manufacturing cycles
• Ensure high quality designs with fast full-chip debug
• Diminish the cost of IP merging

Lightning Fast Chip Finishing  

Laker Blitz is optimized for speed and productivity during the final steps of the physical design process. It uses innovative database technologies to dramatically speed the import, editing and export of the massive GDSII data files associated with today’s advanced node system-on-chip (SoC) and large chip implementations. The Blitz technology enables high-speed access to chip-level layout data with the complete physical design hierarchy to help you: 

• Load and view huge GDSII files 5 to 20 times faster than conventional layout editors
• Manipulate layout data for IP merging and SoC assembly applications
• Run cell, window or full-chip DRC reviews and make layout corrections in single environment

                           

More than a Viewer

Laker Blitz is built on the production-proven technology platform used by the Laker Custom Layout System, upon which hundreds of companies have deployed design flows to produce high-quality chip layouts. It leverages the core suite of Laker layout editing commands and its unmatched tool interoperability to help designers reduce the time and effort required to achieve final tapeout.

Core Features 

• Built-in net highlighting capabilities to rapidly trace critical nets for full-chip debug
• Automated data manipulation with extensive library of Laker Tcl extensions
• Integrated DRC with all top tier sign-off tools, including Calibre and IC Validator
• · Laker APIs for internal chip finishing and third-party tool integration 

Superior Results with Less Effort

As with all software offerings in SpringSoft’s popular family of Laker Custom IC Design and Layout Automation Solutions, Laker Blitz enables users to achieve superior results with less effort. It brings together high-speed, high capacity database and proven layout technologies that are ideally suited to the chip finishing requirements of semiconductor manufacturers, foundries and fabless design companies. 

Laker layout users appreciate the familiar, easy-to-use graphical interface of the Laker Blitz environment and its compatibility with existing Laker data manipulation and DRC capabilities. New Laker users realize measurable improvements in productivity with more robust chip-level editing features compared to the limited scope of current generation ‘flat’ layout viewers. At the same time, all Laker Blitz users benefit from the dramatic performance boost optimized for critical chip finishing tasks that are otherwise painfully slow with conventional layout editors or an impractical use of expensive digital place-and-route tools.

For information about the complete line of Laker products, visit: Laker Custom IC Design Solutions

Datasheet Download: SS_Laker Custom Layout_Datasheet_Eng.pdf

 

Laker is a trademark of SpringSoft, Inc. All other trademarks or registered trademarks are the property of their respective owners.