SpringSoft Technology Newsletter
April 2011
Welcome to the SpringSoft Technology Newsletter. This is a monthly e-mail newsletter distributed to our customers, partners, and friends to provide information on our Novas Verification Enhancement and Laker Custom IC Design technologies. We hope the information in this newsletter will help you to use our products more effectively in your design and verification environments.
Please see the links at the end of this newsletter for subscription information or to provide feedback that will help us improve future editions.
Verification Enhancement Tips - Custom IC Design Tips - News - Whitepapers - Support - Events - Community
Verification Enhancement Tips:
Trace Complex Signals in Schematic View
Complex signals, which include SystemVerilog struct, concatenated signals, MDA, and VHDL records, may contain a complex structure and hierarchy. It can be difficult to trace a complex signal precisely in the schematic using traditional methods, especially if you would like to only trace some members of the entire complex signal.
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Fault Impact Ranking in Certitude Guides Analysis & Debug of Non-Detected Faults
In previous newsletter articles, we introduced and discussed the notion of fault classes and prioritization, a relatively new process used by Certitude to group faults and schedule their qualification based on a number of factors related to the “importance” of the faults. The fault class approach supports a good incremental methodology and helps ensure that early iterations of Certitude find “big problems” in the verification environment that are relatively easy to analyze and fix.
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Generate Behavior Database by esa Utility
The Novas system needs to perform Behavior Analysis on the related design scopes when the Data Expansion command (of the Siloti module) is used for the first time. When it happens, users need to wait for the Behavior Analysis process to finish. The waiting period makes the usage of the Data Expansion command difficult.
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Custom IC Design Tips
Sign-off Driven Layout in Laker Custom Layout
In advanced technology nodes, both the number of design rules and the complexity of those rules are increasing at a rapid pace. There are approximately twice as many rules at 28nm as there were at 90nm and many of the new rules are difficult to comprehend. Yes, there are more layers of metal, but there are also many new rules,
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News:
Real-Time Custom DRC - EE Journal
Consistent with an overall EDA trend, last year Mentor made their Calibre engines available to their Olympus place-and-route technology as Calibre InRoute. The idea here is that, rather than doing all the layout using approximations of the actual DRC engine, checking it later with real DRC, finding all the problems, going back and fixing them, and then checking again (repeat until clean), the DRC engine is brought within the routing tool so that, while you’re doing the routing, it’s being checked by the real DRC.
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SpringSoft's laker Custom IC Layout and Digital Routing Tools Gain Momentum in Memory Chip Market
HSINCHU, Taiwan, April 11, 2011 — SpringSoft, Inc. (TAIEX: 2473), a global supplier of specialized IC design software, today announced that its Laker™ Custom Layout Automation System with the Laker Custom Digital Router continues to penetrate the memory chip market and demonstrate success at implementing the high performance, low power requirements of current and next-generation designs.
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Whitepapers:
Schematic-Driven Layout Automation
Circuit designs continue to get larger and more complicated. As a rule of thumb, layout productivity must double with every new process node in order to keep pace with Moore’s law. For digital implementation, the automatic place and route (AP&R) tools have done a good job of keeping pace. However, productivity gains are harder to achieve for custom IC design. By its nature, custom (transistor-level) design still tends to be done largely by hand by circuit experts. Even when the analog content of today’s SOCs is relatively small, it is not uncommon for the analog portion of the chip to become the gating item in the tapeout schedule.
Free! Download Whitepaper Here
Support:
For Novas products and Certitude products, we plan to drop support for following platforms beginning in 2012.01:
Redhat 3 (RHEL3)
SuSE 9 (SLES9)
Check on latest product revisions, get first class product support: Go to www.springsoft.com/support
Events:
Design Automation Conference
Come visit SpringSoft @ DAC 2011 in San Diego
June 6-8
Booth #2043
Watch SpringSoft.com for more information.
SpringSoft Community News!
Video Hints & Tips - Watch quick tips on how to use SpringSoft products more effectively
EDA Blog - Read about and comment on SpringSoft Technology
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We'd appreciate hearing your suggestions, comments or questions about the SpringSoft Newsletter. Please feel free to contact Karim Azar at +1 (408) 467.7860 or karim_azar@springsoft.com
Novas, Laker, Verdi, Siloti and nWave are trademarks and Debussy is a registered trademark of SpringSoft, Inc. All other trademarks are property of their respective owners.
