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Home » Top Rated

Top Rated

Rank Score Title
1 4.33/5 stars Find Signals with Regular Expression
2 3.86/5 stars New Comment Style Support in VHDL
3 3.55/5 stars Monthly Earnings Report - July 2003
4 3.55/5 stars Springsoft Monthly Sales of June 2005
5 3.53/5 stars Generate a New Schematic from Trace Results
6 3.5/5 stars Convert the Laker system’s Layout Window to a White Background
7 3.47/5 stars Is it Time to Declare a Verification War?
8 3.47/5 stars Create Hierarchical Groups
9 3.45/5 stars Editable Schematic View in Verdi
10 3.44/5 stars Trace Driver/Load Signals from Waveform View
11 3.44/5 stars SPRINGSOFT EXPANDS EDA PATENT PORTFOLIO-Laker Custom IC Design technology awarded 7th U.S. patent
12 3.43/5 stars Transaction Level Debug with SystemVerilog/VMM and Verdi
13 3.42/5 stars Comprehensive SVTB Debug Capabilities Now Available in the Verdi Automated Debug System
14 3.42/5 stars Assertion-Based Hardware Debugging - presented at DVCon
15 3.41/5 stars Verdi Quick-Start
16 3.4/5 stars Interoperability Drives Innovation in Custom IC Design Automation
17 3.4/5 stars Debug PrimeTime Violations in Verdi/Debussy
18 3.37/5 stars DAC 2007 at San Diego, California, June 4 - June 8, Booth# 2379
19 3.35/5 stars Extract Signals from the FSDB and Convert to Excel Format
20 3.33/5 stars Expand Overlapped Transactions

 


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